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Verilog digital system design: rt level synthesis testbench and verification. Rt level synthesis testbench and verification.

By: Material type: TextTextLanguage: English Publication details: New Delhi Tata McGraw Hill Publishing Company Ltd 2008Edition: 2Description: xvi,384ISBN:
  • 9780070252219
Subject(s): DDC classification:
  • 621.395 NAVZ
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Item type Current library Collection Call number Status Barcode
Book Book St Aloysius Institute of Management & Information Technology MCA 621.395 NAVZ (Browse shelf(Opens below)) Available MCA08977
Total holds: 0

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