Navabi, Zainalabedin Navabi. <br/><br/>
Verilog digital system design: rt level synthesis testbench and verification.  Rt level synthesis testbench and verification. 

 - 2 
 - New Delhi  Tata McGraw Hill Publishing Company Ltd  2008 
 - xvi,384 
<br/><br/><label>ISBN: </label>9780070252219 
<br/><br/><label>Subjects--Topical Terms: </label><br/>Digital Systems
<br/><br/><label>Dewey Class. No.: </label>621.395 NAVZ